I work as PhD student as part of NTNU's Computer Archtitecture Lab (CAL). My research is part of the Balancing Compute and Memory Performance in Reconfigurable Accelerators with Analytical Modeling (BAMPAM) project, which aims to enable automatic accelerator generation through the use of tightly integrated reconfigurable fabrics.

My focus is primarily on front end problems related to intelligently detecting and selecting appropriate code regions to offload, and the various constraints that different target devices impose on the suitability of these regions.