Background and activities
Kjetil Svarstad is a Professor at the Department of Electronics and Telecommunications. He belongs to the Circuits and Systems research group. Professor Svarstad has a MSc and a PhD in VLSI design and architecture both from NTNU. He has been a board member for a technology startup company and an electronic arts center, as well as leader of the national VHDL user´s group.
Teaching and Research
- System-on-chip design
- System level languages and descriptions
- Run-time reconfigurable systems on FPGA, formal and assertion based
- 2006- Professor NTNU
- 2011-2012 Visiting Professor, TIMA Laboratoire, INP Grenoble, France
- 1985-2005 Senior Research Scientist, SINTEF
- 1999-2000 Visiting researcher, TIMA Laboratoire, INP Grenoble, France
Scientific, academic and artistic work
Displaying a selection of activities. See all publications in the database
- (2018) Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions. International Journal of Reconfigurable Computing. vol. 2018.
- (2017) An efficient hardware architecture of CAVLC encoder based on stream processing. Microelectronics Journal. vol. 67.
- (2016) A low-complexity MPEG-2 to H.264/AVC wavefront intra-frame transcoder architecture. Journal of Real-Time Image Processing.
- (2015) An MPEG-2 to H.264/AVC intra-frame transcoder architecture with mode decision in transform domain. IEEE transactions on consumer electronics. vol. 61 (1).
- (2014) A High-Throughput and Low-Complexity H.264/AVC Intra 16x16 Prediction Architecture for HD Video Sequences. TELFOR Journal. vol. 6 (2).
Part of book/report
- (2013) Assertion based verification using PSL-like properties in Haskell. Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).
- (2013) Synthesizable Assertion Checkers in High Levels of Abstraction. Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on.
- (2013) System-level modelling of dynamic reconfigurable designs using functional programming abstractions. Quality Electronic Design (ISQED), 2013 14th International Symposium on.
- (2013) A High-Throughput and Low-Complexity H.264/AVC Intra 16x16 Prediction Architecture for HD video sequences. 2013 21st Telecommunications Forum (TELFOR).
- (2013) An Area Efficient Hardware Architecture Design for H.264/AVC Intra Prediction Reconstruction Path based on Partial Reconfiguration. Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).
- (2013) Low Complexity H.264/AVC 4×4 Intra Prediction Architecture with Macroblock/Block Reordering. Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on.
- (2012) Modeling of Dynamic Reconfigurable Systems in Haskell. Proceedings of 22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012.
- (2012) AMBIENT HARDWARE AND THE CASE FOR TRANSCODING MEDIA STREAMS. Proceedings of 22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012.
- (2010) The challenges of implementing fine-grained power gating. Proceedings of the 20th symposium on Great lakes symposium on VLSI.
- (2009) Event Control and Programming for Microprocessor Peripheral Systems. Norchip 2009, Proceedings of.