TDT4255 - Hardware Design


Examination arrangement

Examination arrangement: Work
Grade: Letters

Evaluation Weighting Duration Grade deviation Examination aids
Work 100/100

Course content

Advanced topics in hardware design. Design issues including datapath, control and pipelining as well as implementation issues including assembly programming, high-level programming, hardware description languages, specification, partitioning, testing and verification. Embedded Systems, Field-Programmable Gate Arrays (FPGAs) and advanced Microprocessor instruction sets.

Learning outcome

The course aims at teaching knowledge and skills in hardware design.

Learning methods and activities

Auditorium lectures, self-study. Compulsory assignments and evaluations.

Course materials

David A. Patterson, John L. Hennessy: "Computer Organization and Design - the hardware/software interface". Morgan Kaufmann Publishers. Other relevant text will be announced at the start of the semester.

Credit reductions

Course code Reduction From To
SIF8062 7.5

Version: 1
Credits:  7.5 SP
Study level: Second degree level


Term no.: 1
Teaching semester:  AUTUMN 2010

Language of instruction: -


Subject area(s)
  • Informatics
  • Technological subjects
Contact information

Department with academic responsibility
Department of Computer Science


Examination arrangement: Work

Term Status code Evaluation Weighting Examination aids Date Time Examination system Room *
Autumn ORD Work 100/100
Room Building Number of candidates
  • * The location (room) for a written examination is published 3 days before examination date. If more than one room is listed, you will find your room at Studentweb.

For more information regarding registration for examination and examination procedures, see "Innsida - Exams"

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