Rakesh Kumar
About
Rakesh Kumar is an Associate Professor in the Department of Computer Science at Norwegian University of Science and Technology (NTNU). He is affiliated with Computer Architecture Lab (CAL) in the Computing Unit. Before joining NTNU, he was a post-doctoral researcher at Uppsala University, Sweden and the University of Edinburgh, UK. He received his PhD from UPC, Barcelona in 2014.
Research
His current research focuses on improving the efficiency of large-scale datacenters through improvement in processor microarchitecture and memory systems. His previous work explored hardware/software co-designed processors (think of Nvidia Denver) as an energy-efficient alternative to conventional (hardware only) processors. He has also investigated dynamic code translation and optimizations, especially vectorization.
Teaching
- TDT4258 Low Level Programming, Autumn 2023, 2021, 2020, 2019, 2018
- TDT01 Architecture of Computing Systems, Autumn 2023, 2021, 2020, 2019, 2018
- TFE4208 Embedded Systems Design Project, Spring 2022, 2021, 2020, 2019
Competencies
Publications
2024
-
Asheim, Truls;
Kumar, Rakesh.
(2024)
Analyzing and Optimizing Serverless Function Execution.
Norges teknisk-naturvitenskapelige universitet
Norges teknisk-naturvitenskapelige universitet
Doctoral dissertation
-
Allam, Abdullah;
Kumar, Rakesh.
(2024)
Vector Unit for Deeply-embedded, Low-power RISC-V Processors.
NTNU
Masters thesis
-
Halvorsen, Markus;
Kumar, Rakesh.
(2024)
Delayed runahead exit policies.
NTNU
Masters thesis
-
Haahjem, Ingrid Margit Eikeland;
Kumar, Rakesh.
(2024)
Continued Prefetching Post-Branch Misprediction.
NTNU
Masters thesis
-
Orrem, Elias;
Kumar, Rakesh;
Brunner, Roman Kaspar.
(2024)
Effective microarchitectural support for interpreted languages.
NTNU
Masters thesis
2023
-
Asheim, Truls;
Grot, Boris;
Kumar, Rakesh.
(2023)
A Storage-Effective BTB Organization for Servers.
IEEE conference proceedings
Academic chapter/article/Conference paper
-
Baumann, Henrik;
Kumar, Rakesh.
(2023)
The Mosaic IQ Microarchitecture.
NTNU
Masters thesis
-
Ghabeli, Sara Roberg;
Kumar, Rakesh.
(2023)
Quantifying the Criticality of Critical Instructions in Out-of-Order Execution.
NTNU
Masters thesis
-
Kanellopoulos, Konstantinos;
Bera, Rahul;
Stojiljkovic, Kosta;
Bostanci, Nisa;
Firtina, Can;
Ausavarungnirun, Rachata.
(2023)
Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
-
Kanellopoulos, Konstantinos;
Nam, Hong Chul;
Bostanci, Nisa;
Bera, Rahul;
Sadrosadati, Mohammad;
Kumar, Rakesh.
(2023)
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
2022
-
Kumar, Rakesh;
Alipour, Mehdi;
Black-Schaffer, David.
(2022)
Freeway to Memory Level Parallelism in Slice-Out-of-Order Cores.
arXiv.org
Academic article
-
Asheim, Truls;
Ahmed Khan, Tanvir;
Kasikci, Baris;
Kumar, Rakesh.
(2022)
Impact of Microarchitectural State Reuse on Serverless Functions.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
-
Asheim, Truls;
Grot, Boris;
Kumar, Rakesh.
(2022)
A Specialized BTB Organization for Servers.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
-
Ugedal, Odin;
Kumar, Rakesh.
(2022)
Mitigating Unnecessary Throttling in Linux CFS Bandwidth Control.
IEEE conference proceedings
Academic chapter/article/Conference paper
-
Kumar, Rakesh;
Grot, Boris.
(2022)
Shooting Down the Server Front-End Bottleneck.
ACM Transactions on Computer Systems
Academic article
-
Kumar, Rakesh;
Alipour, Mehdi;
Black-Schaffer, David.
(2022)
Dependence-aware Slice Execution to Boost MLP in Slice-out-of-order Cores.
ACM Transactions on Architecture and Code Optimization (TACO)
Academic article
2021
-
Asheim, Truls;
Grot, Boris;
Kumar, Rakesh.
(2021)
BTB-X: A Storage-Effective BTB Organization.
IEEE computer architecture letters
Academic article
-
Kumar, Rakesh;
Ugedal, Odin.
(2021)
Bandwidth Control And Fairness In The Linux Scheduler.
NTNU
Masters thesis
-
Kumar, Rakesh;
Martínez, Alejandro;
Gonzalez, Antonio.
(2021)
A Variable Vector Length SIMD Architecture for HW/SW Co-designed Processors.
arXiv.org
Academic article
-
Ahmed Khan, Tanvir;
Brown, Nathan;
Sriraman, Akshitha;
Soundararajan, Niranjan;
Kumar, Rakesh;
Devietti, Joseph.
(2021)
Twig: Profile-Guided BTB Prefetching for Data Center
Applications.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
2020
-
Caccialino, Marco;
Kumar, Rakesh.
(2020)
Eliminating Unnecessary Broadcasts to Simplify Out-of-Order Instruction Scheduling.
NTNU
Masters thesis
-
Strupe, Fredrik;
Kumar, Rakesh.
(2020)
Probing the Armv8-A ISA for Hidden Instructions through Processor Fuzzing.
NTNU
Masters thesis
-
Asheim, Truls;
Kumar, Rakesh;
Grot, Boris.
(2020)
Fetch-Directed Instruction Prefetching Revisited.
arXiv.org
Academic article
-
Alipour, Mehdi;
Kumar, Rakesh;
Kaxiras, Stefanos;
Black-Schaffer, David.
(2020)
Delay and Bypass: Ready and Criticality Aware Instruction Scheduling in Out-of-Order Processors.
IEEE Symposium on High-Performance Computer Architecture (HPCA)
Academic article
2019
-
Kumar, Rakesh;
Alipour, Mehdi;
Black-Schaffer, David.
(2019)
Freeway: Maximizing MLP for Slice-Out-of-Order Execution.
IEEE Symposium on High-Performance Computer Architecture (HPCA)
Academic article
-
Alipour, Mehdi;
Kumar, Rakesh;
Kaxiras, Stefanos;
Black-Schaffer, David.
(2019)
FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors.
Design, Automation and Test in Europe (DATE)
Academic article
Journal publications
-
Kumar, Rakesh;
Alipour, Mehdi;
Black-Schaffer, David.
(2022)
Freeway to Memory Level Parallelism in Slice-Out-of-Order Cores.
arXiv.org
Academic article
-
Kumar, Rakesh;
Grot, Boris.
(2022)
Shooting Down the Server Front-End Bottleneck.
ACM Transactions on Computer Systems
Academic article
-
Kumar, Rakesh;
Alipour, Mehdi;
Black-Schaffer, David.
(2022)
Dependence-aware Slice Execution to Boost MLP in Slice-out-of-order Cores.
ACM Transactions on Architecture and Code Optimization (TACO)
Academic article
-
Asheim, Truls;
Grot, Boris;
Kumar, Rakesh.
(2021)
BTB-X: A Storage-Effective BTB Organization.
IEEE computer architecture letters
Academic article
-
Kumar, Rakesh;
Martínez, Alejandro;
Gonzalez, Antonio.
(2021)
A Variable Vector Length SIMD Architecture for HW/SW Co-designed Processors.
arXiv.org
Academic article
-
Asheim, Truls;
Kumar, Rakesh;
Grot, Boris.
(2020)
Fetch-Directed Instruction Prefetching Revisited.
arXiv.org
Academic article
-
Alipour, Mehdi;
Kumar, Rakesh;
Kaxiras, Stefanos;
Black-Schaffer, David.
(2020)
Delay and Bypass: Ready and Criticality Aware Instruction Scheduling in Out-of-Order Processors.
IEEE Symposium on High-Performance Computer Architecture (HPCA)
Academic article
-
Kumar, Rakesh;
Alipour, Mehdi;
Black-Schaffer, David.
(2019)
Freeway: Maximizing MLP for Slice-Out-of-Order Execution.
IEEE Symposium on High-Performance Computer Architecture (HPCA)
Academic article
-
Alipour, Mehdi;
Kumar, Rakesh;
Kaxiras, Stefanos;
Black-Schaffer, David.
(2019)
FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors.
Design, Automation and Test in Europe (DATE)
Academic article
Part of book/report
-
Asheim, Truls;
Grot, Boris;
Kumar, Rakesh.
(2023)
A Storage-Effective BTB Organization for Servers.
IEEE conference proceedings
Academic chapter/article/Conference paper
-
Kanellopoulos, Konstantinos;
Bera, Rahul;
Stojiljkovic, Kosta;
Bostanci, Nisa;
Firtina, Can;
Ausavarungnirun, Rachata.
(2023)
Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
-
Kanellopoulos, Konstantinos;
Nam, Hong Chul;
Bostanci, Nisa;
Bera, Rahul;
Sadrosadati, Mohammad;
Kumar, Rakesh.
(2023)
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
-
Asheim, Truls;
Ahmed Khan, Tanvir;
Kasikci, Baris;
Kumar, Rakesh.
(2022)
Impact of Microarchitectural State Reuse on Serverless Functions.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
-
Asheim, Truls;
Grot, Boris;
Kumar, Rakesh.
(2022)
A Specialized BTB Organization for Servers.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
-
Ugedal, Odin;
Kumar, Rakesh.
(2022)
Mitigating Unnecessary Throttling in Linux CFS Bandwidth Control.
IEEE conference proceedings
Academic chapter/article/Conference paper
-
Ahmed Khan, Tanvir;
Brown, Nathan;
Sriraman, Akshitha;
Soundararajan, Niranjan;
Kumar, Rakesh;
Devietti, Joseph.
(2021)
Twig: Profile-Guided BTB Prefetching for Data Center
Applications.
Association for Computing Machinery (ACM)
Academic chapter/article/Conference paper
Report
-
Asheim, Truls;
Kumar, Rakesh.
(2024)
Analyzing and Optimizing Serverless Function Execution.
Norges teknisk-naturvitenskapelige universitet
Norges teknisk-naturvitenskapelige universitet
Doctoral dissertation
-
Allam, Abdullah;
Kumar, Rakesh.
(2024)
Vector Unit for Deeply-embedded, Low-power RISC-V Processors.
NTNU
Masters thesis
-
Halvorsen, Markus;
Kumar, Rakesh.
(2024)
Delayed runahead exit policies.
NTNU
Masters thesis
-
Haahjem, Ingrid Margit Eikeland;
Kumar, Rakesh.
(2024)
Continued Prefetching Post-Branch Misprediction.
NTNU
Masters thesis
-
Orrem, Elias;
Kumar, Rakesh;
Brunner, Roman Kaspar.
(2024)
Effective microarchitectural support for interpreted languages.
NTNU
Masters thesis
-
Baumann, Henrik;
Kumar, Rakesh.
(2023)
The Mosaic IQ Microarchitecture.
NTNU
Masters thesis
-
Ghabeli, Sara Roberg;
Kumar, Rakesh.
(2023)
Quantifying the Criticality of Critical Instructions in Out-of-Order Execution.
NTNU
Masters thesis
-
Kumar, Rakesh;
Ugedal, Odin.
(2021)
Bandwidth Control And Fairness In The Linux Scheduler.
NTNU
Masters thesis
-
Caccialino, Marco;
Kumar, Rakesh.
(2020)
Eliminating Unnecessary Broadcasts to Simplify Out-of-Order Instruction Scheduling.
NTNU
Masters thesis
-
Strupe, Fredrik;
Kumar, Rakesh.
(2020)
Probing the Armv8-A ISA for Hidden Instructions through Processor Fuzzing.
NTNU
Masters thesis
Knowledge Transfer
2020
-
Academic lectureStrupe, Fredrik; Kumar, Rakesh. (2020) Uncovering Hidden Instructions in Armv8-A Implementations. 9th International Workshop on Hardware and Architectural Support for Security and Privacy (HASP) 2020-10-17 - 2020-10-17
2018
-
PosterAlipour, Mehdi; Kumar, Rakesh; Kaxiras, Stefanos; Black-Schaffer, David. (2018) A Minimum Out-of-Order Core. IEEE/ACM Student Research Competition at International Symposium on Microarchitecture (MICRO) 2018-10-20 - 2018-10-24