Yaman Umuroglu
About
Research
My passion is co-design of computer architectures and algorithms: when working in a specific domain, how do we design a computer architecture to exploit the key properties of the domain? And conversely, how do we adjust the algorithms in the domain to better match the capabilities that silicon chips can offer? I am specifically interested in applying these techniques in the domain of edge AI where we try to bring perception and intelligence to power- and energy-limited embedded systems.
Background
- Adjunct Associate Professor, NTNU (2026 - )
- Principal Edge AI Designer, EmLogic (2026 - )
- Principal Engineer, AMD and Xilinx Research (2018 - 2025)
- PhD student, NTNU (2013 - 2018)
- MSc in Embedded Computing Systems, Erasmus Mundus, NTNU and University of Southampton (2011 - 2013)
- BSc in Computer Engineering, Middle East Technical University (2006 - 2011)
Publications
2026
-
Bezaitis, Charalampos;
Umuroglu, Yaman;
Liu, Di;
Själander, Hans Magnus.
(2026)
Towards Bit-Shareable Inference on Microcontrollers.
Design, Automation and Test in Europe (DATE)
Academic article
2018
-
Umuroglu, Yaman;
Sasnayake Mudiyanselage, Lahiru Kasun Rasnayake;
Själander, Magnus.
(2018)
BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing.
Academic chapter
2017
-
Fraser, Nicholas J.;
Umuroglu, Yaman;
Gambardella, Giulio;
Blott, Michaela;
Leong, Philip W.;
Vissers, Kees;
Jahre, Magnus.
(2017)
Scaling Binarized Neural Networks on Reconfigurable Logic.
Academic chapter
-
Umuroglu, Yaman;
Jahre, Magnus.
(2017)
Work-in-Progress: Towards Efficient Quantized Neural Network Inference on Mobile Devices.
Academic chapter
-
Blott, Michaela;
Preusser, Thomas B.;
Fraser, Nicholas J.;
Gambardella, Giulio;
O'Brien, Kenneth;
Umuroglu, Yaman;
Leeser, Miriam.
(2017)
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic.
Academic chapter
-
Umuroglu, Yaman;
Fraser, Nicholas J.;
Gambardella, Giulio;
Blott, Michaela;
Leong, Philip W.;
Jahre, Magnus;
Vissers, Kees.
(2017)
FINN: A Framework for Fast, Scalable Binarized Neural Network Inference.
Academic chapter
2016
-
Umuroglu, Yaman;
Jahre, Magnus.
(2016)
Random access schemes for efficient FPGA SpMV acceleration.
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Academic article
2015
-
Brandslet, Steinar;
Umuroglu, Yaman;
Tufte, Gunnar.
(2015)
Tre måneder på å gjøre det umulige.
Gemini
Professional article
-
Umuroglu, Yaman;
Morrison, Donn;
Jahre, Magnus.
(2015)
Hybrid Breadth-First Search on a Single-Chip FPGA-CPU Heterogeneous Platform.
Academic chapter
-
Umuroglu, Yaman;
Jahre, Magnus.
(2015)
A Vector Caching Scheme for Streaming FPGA SpMV Accelerators.
Academic chapter
2014
-
Umuroglu, Yaman;
Jahre, Magnus.
(2014)
An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators.
Academic chapter
-
Umuroglu, Yaman;
Jahre, Magnus.
(2014)
Memory-Centric Design for FPGA SpMV Accelerators.
Academic chapter
Journal publications
-
Bezaitis, Charalampos;
Umuroglu, Yaman;
Liu, Di;
Själander, Hans Magnus.
(2026)
Towards Bit-Shareable Inference on Microcontrollers.
Design, Automation and Test in Europe (DATE)
Academic article
-
Brandslet, Steinar;
Umuroglu, Yaman;
Tufte, Gunnar.
(2015)
Tre måneder på å gjøre det umulige.
Gemini
Professional article
-
Umuroglu, Yaman;
Jahre, Magnus.
(2016)
Random access schemes for efficient FPGA SpMV acceleration.
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Academic article
Part of book/report
-
Umuroglu, Yaman;
Morrison, Donn;
Jahre, Magnus.
(2015)
Hybrid Breadth-First Search on a Single-Chip FPGA-CPU Heterogeneous Platform.
Academic chapter
-
Fraser, Nicholas J.;
Umuroglu, Yaman;
Gambardella, Giulio;
Blott, Michaela;
Leong, Philip W.;
Vissers, Kees;
Jahre, Magnus.
(2017)
Scaling Binarized Neural Networks on Reconfigurable Logic.
Academic chapter
-
Umuroglu, Yaman;
Jahre, Magnus.
(2017)
Work-in-Progress: Towards Efficient Quantized Neural Network Inference on Mobile Devices.
Academic chapter
-
Umuroglu, Yaman;
Jahre, Magnus.
(2014)
An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators.
Academic chapter
-
Umuroglu, Yaman;
Jahre, Magnus.
(2014)
Memory-Centric Design for FPGA SpMV Accelerators.
Academic chapter
-
Umuroglu, Yaman;
Jahre, Magnus.
(2015)
A Vector Caching Scheme for Streaming FPGA SpMV Accelerators.
Academic chapter
-
Umuroglu, Yaman;
Sasnayake Mudiyanselage, Lahiru Kasun Rasnayake;
Själander, Magnus.
(2018)
BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing.
Academic chapter
-
Blott, Michaela;
Preusser, Thomas B.;
Fraser, Nicholas J.;
Gambardella, Giulio;
O'Brien, Kenneth;
Umuroglu, Yaman;
Leeser, Miriam.
(2017)
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic.
Academic chapter
-
Umuroglu, Yaman;
Fraser, Nicholas J.;
Gambardella, Giulio;
Blott, Michaela;
Leong, Philip W.;
Jahre, Magnus;
Vissers, Kees.
(2017)
FINN: A Framework for Fast, Scalable Binarized Neural Network Inference.
Academic chapter
Outreach
2023
-
Conference lectureJellum, Erling Rennemo; Umuroglu, Yaman; Orlandic, Milica; Schoeberl, Martin. (2023) FPGA-tidbits: Rapid Prototyping of FPGA Accelerators in Chisel. DSD
2014
-
Conference lectureUmuroglu, Yaman; Jahre, Magnus. (2014) An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators. IEEE International Conference on Computer Design
-
Conference posterUmuroglu, Yaman; Jahre, Magnus. (2014) Memory-Centric Design for FPGA SpMV Accelerators. International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems