Background and activities

Teaching

I am involved in teaching the following courses:

I also supervise project and master thesis topics within computer architecture and design. Current project and master thesis topics are available at IDIs web pages. I often co-supervise projects and masters with local and national industry partners such as ARM, Nordic Semiconductor and Silicon Labs (formerly Energy Micro).

The topics and reports of my supervised master theses can be found on NTNU Open.

Research

My main research area is memory systems for Chip Multiprocessors (CMPs). CMPs are often referred to as multi-core architectures. In addition, I am interested in heterogeneous computer systems, energy efficiency, computer architecture simulation, compilers and system software.

I am currently involved in the following research projects:

I am also the group leader of the Computing research group at IDI.

I currently supervise/mentor the following PhD students and post docs:

I have supervised/metored the following PhD students and post docs:

  • Co-supervisor for Dr. Odd Rune Strømmen Lykkebø (2012-2017), first employer Nnaisense
  • Mentor for Post doc. Dr. Juan Manuel Cebrian (2012-2014), first employer UPC/BSC
  • Mentor for Post doc. Dr. Nikita Nikitin (2013-2014), first employer Mentor Graphics

My most recent research appears below. For more details regarding my publications, visit my Google Scholar profile or Cristin.

The following papers are in press:

Scientific, academic and artistic work

A selection of recent journal publications, artistic productions, books, including book and report excerpts. See all publications in the database

2017

  • Schuchart, Joseph; Gerndt, Michael; Kjeldsberg, Per Gunnar; Lysaght, Michael; Horák, David; Říha, Lubomír; Gocht, Andreas; Sourouri, Mohammed; Kumaraswamy, Madhura; Chowdhury, Anamika; Jahre, Magnus; Diethelm, Kai; Bouizi, Othman; Mian, Umbreen Sabir; Kružík, Jakub; Sojka, Radim; Beseda, Martin; Kannan, Venkatesh; Bendifallah, Zakaria; Hackenberg, Daniel; Nagel, Wolfgang E.. (2017) The READEX formalism for automatic tuning for energy efficiency. Computing.
  • Fraser, Nicholas J.; Umuroglu, Yaman; Gambardella, Giulio; Blott, Michaela; Leong, Philip W.; Vissers, Kees; Jahre, Magnus. (2017) Scaling Binarized Neural Networks on Reconfigurable Logic. Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms.
  • Umuroglu, Yaman; Fraser, Nicholas J.; Gambardella, Giulio; Blott, Michaela; Leong, Philip W.; Jahre, Magnus; Vissers, Kees. (2017) FINN: A Framework for Fast, Scalable Binarized Neural Network Inference. Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays.

2016

  • Umuroglu, Yaman; Jahre, Magnus. (2016) Random access schemes for efficient FPGA SpMV acceleration. Microprocessors and microsystems. vol. 47B.
  • Kalb, Tobias; Kalms, Lester; Göhringer, Diana; Pons, Carlota; Marty, Fabien; Muddukrishna, Ananya; Jahre, Magnus; Kjeldsberg, Per Gunnar; Ruf, Boitumelo; Schuchert, Tobias; Tchouchenkov, Igor; Ehrenstråhle, Carl; Peterson, Magnus; Christensen, Flemming; Paolillo, Antonio; Lemer, Christian; Rodriguez, Ben; Bernard, Guillaume; Duhem, Francois; Millet, Philippe. (2016) TULIPP: Towards Ubiquitous Low-power Image Processing Platforms. IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS).
  • Reissmann, Nico; Falch, Thomas Løfsgaard; Bjørnseth, Benjamin Andreassen; Bahmann, Helge; Meyer, Jan Christian; Jahre, Magnus. (2016) Efficient control flow restructuring for GPUs. International Conference on High Performance Computing & Simulation (HPCS).
  • Reissmann, Nico; Jahre, Magnus; Bahmann, Helge. (2016) Compiling with the Regionalized Value State Dependence Graph. Acaces 2016: poster abstract.

2015

2014

2013

2011

2010

2009