Background and activities

Teaching

I am involved in teaching the following courses:

I also supervise project and master thesis topics within computer architecture and design. Current project and master thesis topics are available at IDIs web pages. I often co-supervise projects and masters with local and national industry like ARM, Nordic Semiconductor and Silicon Labs (formerly Energy Micro).

The topics and reports of my supervised master theses can be found in DAIM.

Research

My main research area is memory systems for Chip Multiprocessors (CMPs). CMPs are often referred to as multi-core architectures. In addition, I am interested in heterogeneous computer systems, energy efficiency, computer architecture simulation, compilers and system software.

I am currently involved in the following research projects:

I am also the group leader of the Computer Architecture and Design (CARD) research group at IDI.

I currently supervise/mentor the following PhD students and post docs:

I have supervised/metored the following PhD students and post docs:

  • Post doc. Dr. Juan Manuel Cebrian (2012-2014)
  • Post doc. Dr. Nikita Nikitin (2013-2014)

My most recent research appears below. For more details regarding my publications, visit my Google Scholar profile or Cristin.

In addition, the following papers are currently in press:

  • Perfect Reconstructability of Control Flow from Demand Dependence Graphs; Helge Bahmann, Nico Reissmann, Magnus Jahre and Jan Christian Meyer; To appear in ACM Transactions on Architecture and Code Optimization (TACO)

Scientific, academic and artistic work

A selection of recent journal publications, artistic productions, books, including book and report excerpts. See all publications in the database

Journal publications

Part of book/report

  • Cebrian, Juan; Jahre, Magnus; Natvig, Lasse. (2014) Optimized Hardware for Suboptimal Software: The Case for SIMD-aware Benchmarks. IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE.
  • Iordan, Alexandru Ciprian; Jahre, Magnus; Natvig, Lasse. (2014) Victim Selection Policies for Intel TBB: Overheads and Energy Footprint. Architecture of Computing Systems – ARCS 2014.
  • Jahre, Magnus. (2014) Graph-based Performance Accounting for Chip Multiprocessor Memory Systems. Proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques (PACT).
  • Nikitin, Nikita; Jahre, Magnus. (2014) Patterned Heterogeneous CMPs: The Case for Regularity-Driven System-Level Synthesis. 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'14).
  • Reissmann, Nico; Meyer, Jan Christian; Jahre, Magnus. (2014) A Study of Energy and Locality Effects using Space-filling Curves. Proceedings of the 28th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2014) and IPDPS 2014 Workshops (IPDPSW 2014).
  • Umuroglu, Yaman; Jahre, Magnus. (2014) An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators. 2014 32nd IEEE International Conference on Computer Design (ICCD).
  • Umuroglu, Yaman; Jahre, Magnus. (2014) Memory-Centric Design for FPGA SpMV Accelerators. ACACES 2014: poster abstracts.
  • Iordan, Alexandru Ciprian; Jahre, Magnus; Natvig, Lasse. (2013) On the Energy Footprint of Task Based Parallel Applications. Proceedings of the 2013 International Conference on High Performance Computing & Simulation (HPCS 2013).
  • Reissmann, Nico; Jahre, Magnus. (2013) Energy Efficient Memory Systems. Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems.
  • Iordan, Alexandru Ciprian; Jahre, Magnus; Natvig, Lasse. (2012) Towards Efficient Simulation of Task Based Parallel Applications. Norsk informatikkonferanse NIK 2012; Universitetet i Nordland 19 – 21 november 2012.
  • Grannæs, Marius; Jahre, Magnus; Natvig, Lasse. (2010) Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching. Proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers (HiPEAC).
  • Jahre, Magnus; Grannæs, Marius; Natvig, Lasse. (2009) A Quantitative Study of Memory System Interference in Chip Multiprocessor Architectures. 11th IEEE International Conference on High Performance Computing and Communications (HPCC 2009).

Postal address

Department of Computer and Information Science Norwegian University of Science and Technology 7491 Trondheim Norway