Background and activities
Magnus Själander is an Associate Professor at the Department of Computer Science and a Visiting Senior Lecturer at the Department of Information Technology, Uppsala University. He is the coordinator of the Energy Efficient Computing Systems (EECS) research initiative at NTNU and the head of the Computing unit at the Department of Computer Science, NTNU. Själander has an M.Sc. from Luleå University and a Ph.D. from Chalmers University of Technology. Before joining NTNU, Själander worked as a Digital Design Engineer at Aeroflex Gaisler (2008-2009) and as a researcher at NXP Semiconductors (2007), Florida State University (2012-2013) and Uppsala University (2014-2015).
Själander's research focuses on the design of high-performance and energy-efficient systems at all scales. His background lies primarily in computer architecture and circuit design, and he has led implementation projects in both FPGA and ASIC technologies. Recent projects focus increasingly on hardware/software codesign and efficient low-power systems (compiler, architecture, and hardware implementation) for high-efficiency computing. The driving philosophy behind these projects is that by extracting more information from the application and by monitoring the system, we can better control the hardware to use resources more efficiently in terms of performance and power.
- Computer Architecture Laboratory (CAL)
- Computing group at NTNU
- Energy Efficient Computing Systems (EECS) at NTNU
- Uppsala Architecture Research Team (UART)
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
- SOCRATES: Self-Organizing Computational substRATES
- Power Management for LTE base stations
- Twin-Precision Multipliers
- TDT4260 Computer Architecture, Examiner, Spring 2018.
- TDT01 Architecture of Computing Systems, Examiner, Autumn 2017.
- TDT4258 Low-Level Programming, Coordinator, Autumn 2017.
- TDT4260 Computer Architecture, Examiner, Spring 2017.
- TDT4258 Low-Level Programming, Coordinator, Autumn 2016.
- TDT4260 Computer Architecture, Examiner, Spring 2016.